• DocumentCode
    1608436
  • Title

    Electron and hole mobility enhancements in sub-10 nm-thick strained silicon directly on insulator fabricated by a bond and etch-back technique

  • Author

    Åberg ; Olubuyide, O.O. ; Chléirigh, C. Ní ; Lauer, I. ; Antoniadis, D.A. ; Li, J. ; Hull, R. ; Hoyt, J.L.

  • Author_Institution
    Microsystems Technol. Lab., MIT, Cambridge, MA, USA
  • fYear
    2004
  • Firstpage
    52
  • Lastpage
    53
  • Abstract
    Electron and hole mobility enhancements are studied in Ge-free strained silicon directly on insulator fabricated by a bond and etch-back technique, for the first time. For inversion charge densities of 1013 cm-2, electron and hole mobility enhancements of 100% (n-MOSFET, 30% effective Ge content, 15 nm-thick) and 50% (p-MOSFET, 40% effective Ge, 6 nm-thick), respectively are measured in fully depleted strained Si. For a biaxial strain level of 1.25% (30% effective Ge), hole mobility is the same for body thicknesses of 25 and 13 nm, and drops by no more than 5% for a body thickness of 8.5 nm. There is no evidence of strain relaxation, despite a generous thermal budget.
  • Keywords
    MOSFET; electron mobility; elemental semiconductors; hole mobility; silicon; silicon-on-insulator; 10 nm; Si-SiO2; biaxial strain level; bond and etch-back technique; electron enhancements; hole mobility enhancements; inversion charge densities; n-MOSFET; p-MOSFET; strain relaxation; sub-10 nm-thick strained Si; thermal budget; Bonding; Charge carrier processes; Current measurement; Density measurement; Electron mobility; Etching; Insulation; MOSFET circuits; Silicon; Strain measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
  • Print_ISBN
    0-7803-8289-7
  • Type

    conf

  • DOI
    10.1109/VLSIT.2004.1345388
  • Filename
    1345388