Three-dimensional circuit integration based on self-synchronized RF-interconnect using capacitive coupling

Author

Gu, Qun ; Xu, Zhiwei ; Kim, Jongsun ; Ko, Jenwei ; Chang, M. Frank

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

fYear

2004

Firstpage

96

Lastpage

97

Abstract

A self-synchronized RF-interconnect (SSRFI), based on capacitive coupling and peak signal detection, is presented. In this SSRFI, small coupling capacitor (60fF) is used to interconnect vertical active layers in 3-Dimensional IC. The demonstrated SSRFI system, including both transmitter and receiver, has been designed, fabricated and verified in UMC 0.18 μm CMOS with a PRBS data rate of 3Gbit/s, a BER of 1.2×10^-10 and a rms jitter of 1.28ps. The core circuit burns 4mW from a 1.8V supply and occupies 0.02mm² chip area.

Keywords

CMOS integrated circuits; MIS capacitors; integrated circuit interconnections; 0.18 micron; 1.8 V; 3 Gbit/s; 60 fF; capacitive coupling; interconnect vertical active layers; peak signal detection; self-synchronized RF-interconnect; small coupling capacitor; three-dimensional circuit integration; Baseband; CMOS technology; Capacitors; Circuit synthesis; Coupling circuits; Integrated circuit interconnections; Radio frequency; Signal detection; Three-dimensional integrated circuits; Transmitters;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on

Print_ISBN

0-7803-8289-7

Type

conf

DOI

10.1109/VLSIT.2004.1345414

Filename

1345414