DocumentCode
1609913
Title
An efficient algorithm for analysis of non-orthogonal layout
Author
Van Der Meijs, N.P. ; van Genderen, A.J.
Author_Institution
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
fYear
1989
Firstpage
47
Abstract
A new algorithm for analysis of nonorthogonal layout is presented. The algorithm is a combination of the scanline and the corner stitching technique. It performs a directed enumeration of all tiles and pairs of abutting tiles that are retained only in a narrow band of adjustable width sweeping over the artwork. The enumeration provides a clean interface to many layout analysis tasks, such as design rule checking and circuit extraction. With N representing the size of the input, the expected-case time and space complexities of the algorithm are O(N ) and O(√N ), respectively
Keywords
VLSI; circuit layout CAD; computational complexity; analysis of nonorthogonal layout; circuit extraction; clean interface; corner stitching technique; design rule checking; directed enumeration; layout analysis; narrow band of adjustable width; pairs of abutting tiles; scanline; space complexities; time complexities; Algorithm design and analysis; Circuits; Data mining; Data structures; Degradation; Narrowband; Pain; Performance analysis; Terminology; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100289
Filename
100289
Link To Document