DocumentCode
1610011
Title
Performance studies of three-phase cascaded H-Bridge and Diode-Clamped multilevel inverters
Author
Rasheed, Mohammed ; Omar, Rosli ; Sulaiman, Marizan ; Aljanad, Ahmed ; Ahmad, Ayaz
Author_Institution
Fac. of Electr. Eng. (FKE), Univ. Teknikal Malaysia Melaka (UTeM) Hang Tuah Jaya, Durian Tunggal, Malaysia
fYear
2013
Firstpage
281
Lastpage
286
Abstract
This paper discusses a concept of two types multilevel inverters including of Cascaded H-Bridge and Diode-Clamped for harmonic reduction on high power applications. Normally, multilevel inverters can be used to reduce the harmonic problems in electrical distribution systems. These studies focused on the performance and analysis of a three phase multilevel inverters including Cascaded H-Bridge and Diode Clamp based on SPWM approaches. Based on the various simulations on nine levels of multilevel inverters, we found that the Total Harmonics Distortion for voltage (THDv) output for both multilevel inverters is decreased. It also produces lower contents based on the IEC standard.
Keywords
IEC standards; PWM invertors; harmonic distortion; harmonics suppression; IEC standard; SPWM approach; THDv output; diode-clamped multilevel inverters; electrical distribution systems; harmonic reduction; high-power applications; three-phase cascaded H-bridge multilevel inverters; total harmonics distortion-voltage output; Harmonic analysis; Inverters; Pulse width modulation; Semiconductor diodes; Switches; Topology; H-Bridge inverter (CHB); Multilevel inverter; SPWM; diode clamped (NPC);
fLanguage
English
Publisher
ieee
Conference_Titel
Clean Energy and Technology (CEAT), 2013 IEEE Conference on
Conference_Location
Lankgkawi
Print_ISBN
978-1-4799-3237-5
Type
conf
DOI
10.1109/CEAT.2013.6775641
Filename
6775641
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