• DocumentCode
    1614395
  • Title

    Low-Area and High-Speed Approximate Matrix-Vector Multiplier

  • Author

    I-Che Chen ; Hayes, John P.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA
  • fYear
    2015
  • Firstpage
    23
  • Lastpage
    28
  • Abstract
    Matrix multiplication is a high-cost operation that can benefit from efficient hardware implementation. Approximate computing offers a promising way to lower the hardware costs and to speed up the computation by leveraging the error tolerance of applications like image processing. This work proposes a novel approximate matrix-vector multiplier which features low area and high speed. Moreover, its accuracy is dynamically reconfigurable, allowing the user to trade small errors for increased speed. Compared to previous designs, our approach reduces the area cost up to 70% with a 5% average error. With a more relaxed 10% error constraint, it achieves a speedup of 2x. We apply the proposed design to color transformation, a basic operation in face-detection algorithms. The approximate transformed images exhibit only a small decrease in detection accuracy.
  • Keywords
    approximation theory; matrix algebra; multiplying circuits; vectors; approximate computing; approximate matrix vector multiplier; color transformation; error constraint; error tolerance; face detection; high speed matrix vector multiplier; low area matrix vector multiplier; Accuracy; Adders; Clocks; Estimation; Hardware; Indexes; Registers; Matrix-vector multiplication; approximate computing; dynamic accuracy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2015 IEEE 18th International Symposium on
  • Conference_Location
    Belgrade
  • Print_ISBN
    978-1-4799-6779-7
  • Type

    conf

  • DOI
    10.1109/DDECS.2015.35
  • Filename
    7195663