• DocumentCode
    1615085
  • Title

    Performance analysis and improvements on a hybrid cascade architecture for multi-layer neural networks

  • Author

    Nosratinia, Aria ; Ahmadi, M. ; Sridhar, M.

  • Author_Institution
    Cooordinated Sci., Lab., Illinois Univ., Urbana, IL, USA
  • fYear
    1992
  • Firstpage
    1214
  • Abstract
    A series of improvements in a hybrid architecture for multilayer networks is presented. This architecture incorporates the incoming connection strengths and the neurons of each layer into one stage by a multiplexing scheme, hence reducing the complexity of interstage wiring. An analysis of the performance of this architecture is performed and, based on its results, the authors propose a number of improvements. Also, a three-layer network has been implemented in a double metal, single polysilicon p-well CMOS technology based on the proposed improvements. The performance of the improved version is analyzed and compared to the original structure. Bounds on the operating speed of the system are also presented
  • Keywords
    CMOS integrated circuits; feedforward neural nets; multiplexing; neural chips; parallel architectures; performance evaluation; double-metal single-poly p-well CMOS; hybrid cascade architecture; multilayer neural nets; multiplexing scheme; performance analysis; three-layer network; CMOS technology; Counting circuits; Feedforward neural networks; Feedforward systems; Multi-layer neural network; Neural networks; Neurons; Performance analysis; Power engineering and energy; Read only memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
  • Conference_Location
    Washington, DC
  • Print_ISBN
    0-7803-0510-8
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1992.271053
  • Filename
    271053