Development of 13 bit digitally controlled oscillator using fibonacci sequence in 0.18 um CMOS process

Author

Ishihara, M. ; Pokharel, R.K. ; Tomar, A. ; Kanemoto, D. ; Kanaya, H. ; Yoshida, K.

Author_Institution

Dept. of Electron., Kyushu Univ., Fukuoka, Japan

fYear

2011

Firstpage

1634

Lastpage

1637

Abstract

This paper presents a digitally controlled oscillator (DCO) in Inductor-Capacitor (LC) topology with an enhanced frequency-steps and power consumption. Using special Fibonacci sequence method for optimizing capacitor sizes, this digitally-controlled oscillator (DCO) realizes frequency-tuning steps superior than a conventional DCO using binary sequence without increasing the power consumption. The proposed circuit is implemented in 0.18 um CMOS technology and tested. It has a center frequency of 7.9 GHz. The measured phase noise is -117.1 dBc/Hz(@1MHz offset) at carrier frequency of 7.7 GHz.

Keywords

CMOS integrated circuits; Fibonacci sequences; microwave oscillators; power consumption; CMOS process; DCO; LC topology; binary sequence; digital controlled oscillator; fibonacci sequence; frequency 7.7 GHz; frequency 7.9 GHz; frequency-step enhancement; frequency-tuning steps; inductor-capacitor topology; phase noise; power consumption; size 0.18 mum; word length 13 bit; CMOS integrated circuits; CMOS technology; Capacitance; Capacitors; Oscillators; Semiconductor device measurement; Tuning; Fibonacci sequence; digitally controlled oscillator; frequency tuning step; phase noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference Proceedings (APMC), 2011 Asia-Pacific

Conference_Location

Melbourne, VIC

Print_ISBN

978-1-4577-2034-5

Type

conf

Filename

6174080