DocumentCode
1620097
Title
Single crystal silicon contacted double self-aligned bipolar junction transistor by selective epitaxial growth
Author
Subramanian, Chitra K. ; Neudeck, Gerold W.
Author_Institution
Sch. of Electr. Eng., Purdue Univ., West Lafayette, IN, USA
fYear
1994
Firstpage
68
Lastpage
71
Abstract
A novel single crystal silicon contacted double self-aligned transistor (DST) structure, that uses vertical seed epitaxial lateral overgrowth (VELO) is demonstrated. When scaled to smaller dimensions, this structure can provide an 18% improvement in ECL circuit speed
Keywords
bipolar transistors; CVD epitaxial growth; ECL circuit speed; Si; double self-aligned bipolar junction transistor; selective epitaxial growth; vertical seed epitaxial lateral overgrowth; Circuits; Contacts; Crystallization; Epitaxial growth; Fabrication; Laboratories; Parasitic capacitance; Research and development; Silicon; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting,1994., Proceedings of the 1994
Conference_Location
Minneapolis, MN
Print_ISBN
0-7803-1316-X
Type
conf
DOI
10.1109/BIPOL.1994.587861
Filename
587861
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