DocumentCode
1621040
Title
A single-poly BiCMOS technology with 30 GHz bipolar fT
Author
Wang, Chih Hsin ; Van der Velden, Jan
Author_Institution
Dept. of Adv. Technol., Philips Semicond., Sunnyvale, CA, USA
fYear
1994
Firstpage
234
Lastpage
237
Abstract
We present process design and device performance of bipolar transistors embedded in a single-poly BiCMOS technology. The bipolar device possesses a CMOS-like morphology and is easily integrated into a CMOS-based process flow with two additional masks. The integrated process yields a structure with minimum topography. Process concerns associated with the conventional double-poly structure are therefore avoided. Shallow emitter and base junction depth are achieved through a conventional ion implantation approach with proper control of the thermal budget. Bipolar transistors featuring 31 GHz bipolar fT and 4 V BVceo are achieved. The technology thus developed has the highest fT in the category of single-polysilicon BiCMOS process ever reported
Keywords
BiCMOS integrated circuits; 30 GHz; 4 V; Si; bipolar transistors; integrated process; ion implantation; polysilicon; shallow base junction depth; shallow emitter junction depth; single-poly BiCMOS technology; Annealing; BiCMOS integrated circuits; Bipolar transistors; CMOS technology; Fabrication; Implants; Ion implantation; Process design; Surfaces; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting,1994., Proceedings of the 1994
Conference_Location
Minneapolis, MN
Print_ISBN
0-7803-1316-X
Type
conf
DOI
10.1109/BIPOL.1994.587902
Filename
587902
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