Processor Architecture for Road Extraction Based on Projective Transformation

Author

Lee, Sunggae ; Hariyama, Masanori ; Kameyama, Michitaka

Author_Institution

Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai

fYear

2006

Firstpage

1446

Lastpage

1450

Abstract

This paper presents a processor architecture for a robust road-extraction algorithm using stereo images. The road-extraction method estimates a projective-transformation matrix H that represents the geometrical features of road regions. The road region can be robustly extracted using sum of absolute differences (SAD) between one image and a transformed image of the other one. To accelerate the projective transformation, dedicated multipliers are employed. A dynamically reconfigurable architecture for robust estimation and SAD-based extraction is presented. For image size 720times480, the execution time on the proposed processor is 0.05 seconds whereas that on a microprocessor is 2.5 seconds

Keywords

automated highways; feature extraction; reconfigurable architectures; stereo image processing; geometrical feature extraction; processor architecture; projective transformation; reconfigurable architecture; road extraction; stereo image processing; Acceleration; Cameras; Data mining; Electronic mail; Intelligent transportation systems; Microprocessors; Reconfigurable architectures; Roads; Robustness; Transmission line matrix methods; SAD; dynamically reconfigurable processor; homography; projective transformation;

fLanguage

English

Publisher

ieee

Conference_Titel

SICE-ICASE, 2006. International Joint Conference

Conference_Location

Busan

Print_ISBN

89-950038-4-7

Electronic_ISBN

89-950038-5-5

Type

conf

DOI

10.1109/SICE.2006.315822

Filename

4109195