DocumentCode
1624679
Title
Emulation techniques for microcontrollers with internal caches and multiple execution units
Author
Melear, Charles
Author_Institution
Motorola Inc., Austin, TX, USA
fYear
1997
Firstpage
544
Lastpage
553
Abstract
The complexity of modern processors has placed the concepts of efficient program debugging and visibility of the internal busses at odds with each other. When bus cycles occur on the internal busses, extra work has to occur in order to see these cycles on the external busses. Other problems arise in that making all bus cycles visible on the external busses causes the MPC500 to operate in serialized mode. Much of the efficiency of modern processors comes from being able to execute the instructions in an out-of-order execution model. Because the MPC500 has multiple execution units, several instructions can be processed at the same time. Serialization of the program flow would mean that only one instruction could be executed at a time. By putting the necessary status and control signals on the microcontroller, program flow can be determined by also capturing all the bus cycles that are external and then comparing expected program flow to an assembly language listing. Thus, the dual problems of debugging the machine in real time and having continuous external visibility of all cycles on the external bus is resolved
Keywords
microcontrollers; program debugging; system buses; MPC500 processor; bus cycle; emulation; internal bus; internal cache; microcontroller; multiple execution units; program debugging; program flow; Application software; Buildings; Central Processing Unit; Circuits; Debugging; Emulation; Engines; Microcontrollers; Signal processing; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Wescon/97. Conference Proceedings
Conference_Location
Santa Clara, CA
ISSN
1095-791X
Print_ISBN
0-7803-4303-4
Type
conf
DOI
10.1109/WESCON.1997.632382
Filename
632382
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