DocumentCode
1629400
Title
Achieving high-performance Ge MOS devices using high-к gate dielectrics Ga2 O3 (Gd2 O3 ) of sub-nm EOT
Author
Chu, L.K. ; Chu, R.L. ; Lin, C.A. ; Lin, T.D. ; Chiang, T.H. ; Kwo, J. ; Hong, Mingyi
Author_Institution
Dept. of Mat. Sci. & Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear
2010
Firstpage
25
Lastpage
26
Abstract
In this work, without employing any IPL, excellent electrical performances for the Ge MOS devices, i.e. MOSCAPs and MOSFETs, have been demonstrated using ultra high vacuum (UHV) deposited Ga2O3(Gd2O3) [GGO] directly on Ge (100) with the incorporation of fluorine. The GGO/Ge interface is atomically abrupt with negligible Ge inter-diffusion and highly thermodynamically stable withstanding high temperature anneals as previously reported. We firstly fabricated the MOS devices with a thick GGO layer (~14nm) to carry out the charge pumping measurement for the extraction of convincing Dit´s, along with the measurements on the MOSFET Furthermore, we examined the scalability of the GGO layer by reducing its thickness to ~3.5 nm with a thin Al2O3 cap for protection. Very good C-V characteristics and a GGO EOT of <; 1 nm have been achieved.
Keywords
MOS capacitors; MOSFET; aluminium compounds; fluorine; gadolinium compounds; gallium compounds; germanium; high-k dielectric thin films; Al2O3; F; Ga2O3(Gd2O3)-Ge; MOS devices; MOSCAP; MOSFET; charge pumping measurement; high temperature annealing; high-K gate dielectrics; sub-nm interfacial passivation layers; ultrahigh vacuum deposition; Capacitance-voltage characteristics; Dielectrics; Logic gates; MOSFETs; Performance evaluation; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference (DRC), 2010
Conference_Location
South Bend, IN
ISSN
1548-3770
Print_ISBN
978-1-4244-6562-0
Electronic_ISBN
1548-3770
Type
conf
DOI
10.1109/DRC.2010.5551961
Filename
5551961
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