Gate-all-around silicon nanowire MOSFETs and circuits

Author

Sleight, J.W. ; Bangsaruntip, S. ; Majumdar, A. ; Cohen, G.M. ; Zhang, Y. ; Engelmann, S.U. ; Fuller, N.C.M. ; Gignac, L.M. ; Mittal, S. ; Newbury, J.S. ; Frank, M.M. ; Chang, J. ; Guillorn, M.

Author_Institution

IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA

fYear

2010

Firstpage

269

Lastpage

272

Abstract

We demonstrate undoped-body, gate-all-around (GAA) Si nanowire (NW) MOSFETs with excellent electrostatic scaling. These NW devices, with a TaN/Hf-based gate stack, have high drive-current performance with NFET/PFET I_DSAT = 825/950 μA/μm (circumference-normalized) or 2592/2985 μA/μm (diameter-normalized) at supply voltage V_DD = 1 V and off-current I_OFF = 15 nA/μm. Superior NW uniformity is obtained through the use of a combined hydrogen annealing and oxidation process. Clear scaling of short-channel effects versus NW size is observed. Additionally, we observe a divergence of the nanowire capacitance from the planar limit, as expected, as well as enhanced device self-heating for smaller diameter nanowires. We have also applied this method to making functional 25-stage ring oscillator circuits.

Keywords

CMOS integrated circuits; MOSFET; annealing; elemental semiconductors; hafnium compounds; nanowires; oscillators; oxidation; silicon; tantalum compounds; 25-stage ring oscillator circuits; MOSFET; NFET; NW devices; PFET; Si; TaN-HfJk; combined hydrogen annealing-oxidation process; electrostatic scaling; gate-all-around silicon nanowire; nanowire capacitance; short-channel effects; voltage 1 V;

fLanguage

English

Publisher

ieee

Conference_Titel

Device Research Conference (DRC), 2010

Conference_Location

South Bend, IN

ISSN

1548-3770

Print_ISBN

978-1-4244-6562-0

Electronic_ISBN

1548-3770

Type

conf

DOI

10.1109/DRC.2010.5551965

Filename

5551965