Switched capacitor circuit implementation of two-channel filter bank

The aim of this paper is to describe real properties of a two-channel filter bank (FB) implemented by a switched capacitor (SC) technique. The final implementation of the filter bank using an IIR Cauer filter converted into SC filters is described. The whole filter bank was realized on a printed board and the magnitude frequency response was measured for different timing of clock signals. The magnitude frequency responses are compared with the simulated ones and final results are discussed.