A test structure for analysis of temperature distribution in stacked IC with sensing device array

Author

Matsuda, Tadamitsu ; Yamada, Koji ; Iwata, Hiroshi ; Hatakeyama, T. ; Ishizuka, M. ; Ohzone, T.

Author_Institution

Toyama Prefectural Univ., Imizu, Japan

fYear

2014

fDate

24-27 March 2014

Firstpage

104

Lastpage

108

Abstract

A test structure for analysis of temperature distribution in stacked IC, which has a top tier chip attached on a bottom dummy chip with adhesive layer, is presented. The devices with four kinds of thickness of 50-410 um were fabricated. Dependences of the temperature on distance from the heater resistor were analyzed with on-chip sensor arrays, as well as fast transient phenomena. The thinner top tier structures showed the higher temperature and affected the temperature distributions. The test structure can provide an effective way for analysis of thermal properties in various LSIs.

Keywords

integrated circuit measurement; integrated circuit testing; resistors; sensor arrays; temperature distribution; temperature measurement; transient analysis; LSIs; adhesive layer; bottom dummy chip; fast transient phenomena; heater resistor; on-chip sensor arrays; sensing device array; size 50 mum to 410 mum; stacked IC; temperature dependences; temperature distribution analysis; test structure; thermal property analysis; thinner top tier structures; top tier chip; Heating; Resistors; Silicon; Temperature dependence; Temperature distribution; Temperature measurement; Temperature sensors; Integrated circuit packaging; integrated circuit design; integrated circuit measurements; integrated circuit thermal factors; temperature measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures (ICMTS), 2014 International Conference on

Conference_Location

Udine

ISSN

1071-9032

Print_ISBN

978-1-4799-2193-5

Type

conf

DOI

10.1109/ICMTS.2014.6841476

Filename

6841476