DocumentCode
1631148
Title
RF front-end system gain and linearity built-in test
Author
Wang, Qi ; Soma, Mani
Author_Institution
Dept. of Electr. Eng., Washington Univ., Seattle, WA
fYear
2006
Lastpage
233
Abstract
This work addresses the concurrent on-chip measurement of the gain, the input 1-dB compression point (ICP1-dB), and the input-referred third-order interference point (IIP3) of individual RF building blocks in RF front-end systems, using introduced high speed CMOS RF on-chip amplitude detectors, which work up to 20 GHz with high accuracy, small area, and low power consumption
Keywords
CMOS integrated circuits; built-in self test; gain measurement; high-speed integrated circuits; CMOS amplitude detectors; RF amplitude detectors; RF building blocks; RF front-end system; built-in test; concurrent on-chip measurement; gain measurement; high speed amplitude detectors; input-referred interference point; linearity measurement; on-chip amplitude detectors; third-order interference point; Area measurement; Built-in self-test; Detectors; Gain measurement; Linearity; Power measurement; Radio frequency; Radiofrequency interference; System-on-a-chip; Velocity measurement; CMOS RF amplitude; RF test; built-in test; detector; gfain measurement; linearity measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2006. Proceedings. 24th IEEE
Conference_Location
Berkeley, CA
Print_ISBN
0-7695-2514-8
Type
conf
DOI
10.1109/VTS.2006.59
Filename
1617594
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