Efficient metric for register file criticality in processor-based systems

Author

Restrepo-Calle, Felipe ; Cuenca-Asensi, Sergio ; Martinez-Alvarez, Antonio ; Chielle, Eduardo ; Kastensmidt, F.

Author_Institution

Comput. Technol. Dept., Univ. of Alicante, Alicante, Spain

fYear

2014

fDate

12-15 March 2014

Firstpage

1

Lastpage

6

Abstract

This paper presents a metric to estimate the register file criticality in processor-based systems. Due to project constrains, it is mandatory to identify and prioritize the most critical registers to protect when a selective fault mitigation approach is needed. The metric is based on the combination of three different criteria, which are computed dynamically during run-time. The applicability and accuracy of the metric have been evaluated in a set of applications running in the miniMIPS and PicoBlaze microprocessors.

Keywords

circuit reliability; electronic engineering computing; flip-flops; microprocessor chips; radiation hardening (electronics); PicoBlaze microprocessor; critical register identification; critical register prioritisation; dynamic code analysis; efficient metric; miniMIPS microprocessor; processor-based system; register file criticality estimation; run time; selective fault mitigation approach; Accuracy; Clocks; Estimation; Microprocessors; Proposals; Registers; Critical registers; criticality analysis; dependability; microprocessors; radiation hardening by design; reliability;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Workshop - LATW, 2014 15th Latin American

Conference_Location

Fortaleza

Type

conf

DOI

10.1109/LATW.2014.6841922

Filename

6841922