Plasma process integration for larger wafer manufacturing

Summary form only given. We describe a methodology for integrating plasma technology into large wafer manufacturing processes for the purpose of controlling the critical dimensions of those wafers. The Plasma Assisted Chemical Etching (PACE) process is now used commercially to control the Total Thickness variation (TTV) of bulk silicon wafers to ⩽0.2 μm and to produce bonded Silicon-on-Insulator (SOI) wafers with active layers having mean thicknesses of 100-nm or less and layer thickness variations well under 10-nm. We will review recent data supporting the ability of the PACE process to achieve this dimensional control on 200-mm bulk Si and bonded SOI wafers