• DocumentCode
    1638946
  • Title

    A circuit design based approach for 1/f-noise reduction in linear analog CMOS IC´s

  • Author

    Koh, Jeongwook ; Thewes, Roland ; Schmitt-Landsiedel, Doris ; Brederlow, Ralf

  • Author_Institution
    Corporate Res., Infineon Technol. AG, Munich, Germany
  • fYear
    2004
  • Firstpage
    222
  • Lastpage
    225
  • Abstract
    A new circuit design based approach for 1/f noise reduction in linear analog CMOS circuits is presented using a device physics based effect. Compared to a reference circuit, a threefold reduction (5 dB) at 10 Hz in 1/f noise is achieved for an operational amplifier designed in a standard 0.12 μm, 1.5 V CMOS technology.
  • Keywords
    CMOS analogue integrated circuits; integrated circuit design; integrated circuit noise; 0.12 micron; 1.5 V; 1/f-noise reduction; 10 Hz; circuit design based approach; linear analog CMOS IC; Analog integrated circuits; CMOS analog integrated circuits; CMOS integrated circuits; CMOS technology; Circuit noise; Circuit synthesis; MOSFETs; Noise reduction; Operational amplifiers; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
  • Print_ISBN
    0-7803-8287-0
  • Type

    conf

  • DOI
    10.1109/VLSIC.2004.1346566
  • Filename
    1346566
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1638946