Research of transformer based bufferless resonant clock network

This paper accesses the main factors that affect the resonant frequency and power consumption in on-chip transformer based bufferless resonant clock distribution network(CDN), such as on-chip transformers with different ratio, wire width of clock grid and the size of energy compensating cell. Through an unsigned 32*32 bit pipeline multiplier under TSMC 65nm CMOS technology, we perform a post-layout simulation study and suggest the tradeoff among different design variables.