DocumentCode
1638989
Title
Power dissipation estimate by switch level simulation [CMOS circuits]
Author
Tjärnström, Robert
Author_Institution
Dept. of Phys. & Meas. Technol., Linkoping Univ., Sweden
fYear
1989
Firstpage
881
Abstract
A method for calculating power dissipation of digital CMOS circuits is presented. The estimate is made during switch-level simulation and is thus based on the simulated activity in the circuit. Dissipation from dynamic switching, the short-circuit component, and static currents are considered. The average power dissipation is overestimated by as little as 5-10% compared to SPICE results, if X-states and spikes can be avoided during the simulation
Keywords
CMOS integrated circuits; circuit analysis computing; digital integrated circuits; SPICE results; X-states; average power dissipation; digital CMOS circuits; dynamic switching; power dissipation estimate; short-circuit component; simulated circuit activity; spikes; static currents; switch-level simulation; Capacitance; Circuit simulation; Clocks; Energy consumption; Power dissipation; Power measurement; SPICE; Switches; Switching circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100492
Filename
100492
Link To Document