• DocumentCode
    1639328
  • Title

    20Gb/s 0.13μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer

  • Author

    Chiang, Patrick ; Dally, William J. ; Lee, Ming-Ju Edward ; Senthinathan, R. ; Oh, Yangjin ; Horowitz, Mark

  • Author_Institution
    Stanford Univ., CA, USA
  • fYear
    2004
  • Firstpage
    272
  • Lastpage
    275
  • Abstract
    A 20Gb/s transmitter is implemented in 0.13μm CMOS technology. Eight 2.5Gb/s data streams are 4:1 multiplexed, sampled, and retimed into two 10Gb/s data streams. A final 20Gb/s 2:1 output multiplexer, clocked by complementary phases of an LC-VCO (voltage controlled oscillator) in a phase-locked loop, creates 20Gb/s data. The VCO is integrated with the output multiplexer, resonating the load and eliminating the need for clock buffers. Power, active die area, and jitter (RMS/pk-pk) are 165mW, 650μm × 350μm, and 2.37ps/15ps, respectively.
  • Keywords
    CMOS integrated circuits; multiplexing equipment; phase locked loops; transmitters; voltage-controlled oscillators; 0.13 micron; 15 ps; 165 mW; 2.37 ps; 20 Gbit/s; 20Gb/s 0.13μm CMOS serial link transmitter; 350 mm; 650 micron; clock buffers; output multiplexer; phase-locked loop; voltage controlled oscillator; Bandwidth; CMOS technology; Circuits; Clocks; Jitter; Multiplexing; Phase locked loops; Timing; Transmitters; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
  • Print_ISBN
    0-7803-8287-0
  • Type

    conf

  • DOI
    10.1109/VLSIC.2004.1346584
  • Filename
    1346584