DocumentCode
1640945
Title
Calibration for realization errors of two-channel HFB ADC base on single analog filter architecture
Author
Liu, Sujuan ; Yang, Yue ; Zhang, Te ; Chen, Jianxin
Author_Institution
Coll. of Electron. Inf. & Control Eng., Beijing Univ. of Technol., Beijing, China
fYear
2010
Firstpage
219
Lastpage
221
Abstract
The single analog filter (SAF) hybrid filter bank (HFB) ADC is presented in this paper. Base on SAF architecture, a calibration model is derived to integrate the analog filter´s realization errors and channel mismatches errors. A two-channel SAF HFB ADC with 12-bit resolution and 200MHz sampling rate is implemented. The experimental results show that the average spurious-free dynamic range (SFDR) over the whole frequency spectrum enhanced from 35 dB to 88.3 dB when the proposed calibration method has been used.
Keywords
analogue-digital conversion; channel bank filters; SAF hybrid filter bank; SFDR; calibration model; frequency 200 MHz; single analog filter architecture; spurious-free dynamic range; two-channel HFB ADC; word length 12 bit; Bandwidth; Calibration; Equations; Filter bank; Filtering theory; Finite impulse response filter; Mathematical model;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-5797-7
Type
conf
DOI
10.1109/ICSICT.2010.5667787
Filename
5667787
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