A low power 14-bit 1 MS/s differential SAR ADC with on chip multi-segment bandgap reference

In this paper, a 14-bit low power self-timed differential SAR ADC with a new structure high precision multi-segment bandgap reference (BGR) is presented. In this design, Self-timed bit-cycling is adopted to enhance the time efficiency. Gray coding form mode control words are utilized instead of binary for mode control to reduce substrate noise and enhance the linearity of the whole system.