• DocumentCode
    1643179
  • Title

    Si complementary single-electron inverter

  • Author

    Ono, Y. ; Takahashi, Y. ; Yamazaki, K. ; Nagase, M. ; Namatsu, H. ; Kurihara, K. ; Murase, K.

  • Author_Institution
    NTT Basic Res. Labs., Kanagawa, Japan
  • fYear
    1999
  • Firstpage
    367
  • Lastpage
    370
  • Abstract
    A complementary single-electron inverter occupying an extremely small area is fabricated on an SOI substrate. For the fabrication, the vertical pattern-dependent oxidation method, which enables the formation of two tiny single-electron transistors (SETs) aligned in parallel, is advanced so that the two SETs are connected in series to realize an inverter configuration. By controlling peak positions of the conductance curve of the SETs in the inverter using the side gates situated near each SET, input-output transfer with a gain larger than unity is demonstrated at 27 K.
  • Keywords
    logic gates; oxidation; silicon-on-insulator; single electron transistors; 27 K; SOI substrate; Si; Si complementary single electron inverter; conductance; fabrication; single electron transistor; vertical pattern-dependent oxidation; Equivalent circuits; Fabrication; Inverters; Laboratories; Logic circuits; Logic devices; Oxidation; Single electron transistors; Thickness control; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
  • Conference_Location
    Washington, DC, USA
  • Print_ISBN
    0-7803-5410-9
  • Type

    conf

  • DOI
    10.1109/IEDM.1999.824171
  • Filename
    824171