VLSI multiprocessor implementation of block state-space 2-D digital filters

The problem of implementing block state-space two-dimensional digital filters in a VLSI environment is considered. Two implementation structures, namely, the delay and interleaving structures, are used. Both structures are modular and require local communications which are important for VLSI implementation. In addition, the structures achieve linear speedup and involve matrix and vector operations which are suitable for multiprocessor systems such as VLSI array processors