A block processing method for designing high-speed Viterbi detectors

A block-processing method to circumvent the data-rate dependence of conventional architectures on available integrated circuit technology for the Viterbi algorithm is described. The method applies the Viterbi algorithm to a block of received symbols instead of the conventional symbol-by-symbol approach. Backward and forward recursions are used to provide highly modular and layered architectures, requiring replication and suitable interconnection of basic add-compare-select modules. The data rate may be increased by adding more layers of the modules. The area/data rate tradeoff is linear with a slope proportional to the square of the number of states