DocumentCode
1646709
Title
A 100-Gb/s 1:4 Demultiplexer in InP DHBT Technology
Author
Hallin, Joakim ; Kjellberg, Torgil ; Swahn, Thomas
Author_Institution
Microwave Electron. Lab., Chalmers Ind. Technol., Goteborg
fYear
2006
Firstpage
227
Lastpage
230
Abstract
This paper presents a 1:4 demultiplexer fabricated in InP DHBT technology. The demultiplexer is verified to work up to 100 Gb/s at a supply voltage of -3.6 V consuming 2.1 W. It is a half-rate demultiplexer using multi-phase clock architecture. To verify operation up to 100 Gb/s the authors used an in-house PRBS generator chip
Keywords
III-V semiconductors; clocks; demultiplexing equipment; heterojunction bipolar transistors; high-speed integrated circuits; indium compounds; random number generation; -3.6 V; 100 Gbit/s; 2.1 W; DHBT technology; InP; PRBS generator chip; half-rate demultiplexer; high-speed digital circuit; multiphase clock architecture; Clocks; DH-HEMTs; Ethernet networks; Indium phosphide; Latches; Microstrip; Microwave technology; Shunt (electrical); Switches; Voltage; 1:4 Demultiplexer; High-speed digital circuit; InP DHBT;
fLanguage
English
Publisher
ieee
Conference_Titel
Compound Semiconductor Integrated Circuit Symposium, 2006. CSIC 2006. IEEE
Conference_Location
San Antonio, TX
Print_ISBN
1-4244-0126-7
Electronic_ISBN
1-4244-0127-5
Type
conf
DOI
10.1109/CSICS.2006.319941
Filename
4110027
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