• DocumentCode
    1647178
  • Title

    Eleventh Annual IEEE International High-Level Design Validation and Test Workshop

  • fYear
    2006
  • Abstract
    The following topics are dealt with: high-level design validation; test specification; inductive logic programming; cell-based genetic algorithm; formal verification in modern chip design; and program slicing
  • Keywords
    formal specification; formal verification; genetic algorithms; inductive logic programming; learning by example; logic design; microprocessor chips; program slicing; cell-based genetic algorithm; formal verification; high-level design validation; inductive logic programming; modern chip design; program slicing; test specification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High-Level Design Validation and Test Workshop, 2006. Eleventh Annual IEEE International
  • Conference_Location
    Monterey, CA
  • ISSN
    1552-6674
  • Print_ISBN
    1-4244-0679-X
  • Electronic_ISBN
    1552-6674
  • Type

    conf

  • DOI
    10.1109/HLDVT.2006.320000
  • Filename
    4110046