One-transistor nonvolatile SRAM (ONSRAM) on silicon nanowire SONOS

Author

Ryu, Seong-Wan ; Han, Jin-Woo ; Moon, Dong-II ; Choi, Yang-Kyu

Author_Institution

EECS, KAIST, Daejeon, South Korea

fYear

2009

Firstpage

1

Lastpage

4

Abstract

A one-transistor nonvolatile SRAM (ONSRAM) on a silicon nanowire (SiNW) SONOS is demonstrated. A nonvolatile memory (NVM) property is attained by employment of O/N/O gate dielectric stacks as an electron storage node, and SRAM functionality is achieved by exploiting latch phenomena of a floating body in SiNW. Abrupt inverter switching, superior sensing current (Â¿21Â¿A), and robust interference immunity between SRAM and NVM verify the feasibility for the suggested ONSRAM.

Keywords

SRAM chips; elemental semiconductors; flip-flops; nanowires; semiconductor-insulator-semiconductor devices; silicon; switching circuits; O/N/O gate dielectric stacks; ONSRAM; SRAM functionality; Si; SiNW; electron storage node; inverter switching; latch phenomena; nonvolatile memory property; one-transistor nonvolatile SRAM; robust interference immunity; sensing current; silicon nanowire SONOS; Dielectrics; Electrons; Employment; Interference; Inverters; Nonvolatile memory; Random access memory; Robustness; SONOS devices; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2009 IEEE International

Conference_Location

Baltimore, MD

Print_ISBN

978-1-4244-5639-0

Electronic_ISBN

978-1-4244-5640-6

Type

conf

DOI

10.1109/IEDM.2009.5424259

Filename

5424259