• DocumentCode
    1650576
  • Title

    A Linear-Time Approach for Static Timing Analysis Covering All Process Corners

  • Author

    Onaissi, Sari ; Najm, Farid N.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Toronto Univ., Ont.
  • fYear
    2006
  • Firstpage
    217
  • Lastpage
    224
  • Abstract
    Manufacturing process variations lead to circuit timing variability and a corresponding timing yield loss. Traditional corner analysis consists of checking all process corners (combinations of process parameter extremes) to make sure that circuit timing constraints are met at all corners, typically by running static timing analysis (STA) at every corner. This approach is becoming too expensive due to the exponential increase in the number of corners with modern processes. As an alternative, we propose a linear-time approach for STA which covers all process corners in a single pass. Our technique assumes a linear dependence of delay on process parameters and provides tight bounds on the worst-case circuit delay. It exhibits high accuracy (within 1-3%) in practice and, if the circuit has m gates and n relevant process parameters, the complexity of the algorithm is O(mn)
  • Keywords
    delays; logic testing; timing; circuit timing; computational complexity; linear-time approach; manufacturing process; static timing analysis; worst-case circuit delay; Circuit analysis; Circuit testing; Costs; Delay lines; Manufacturing processes; Random variables; Temperature; Timing; Very large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 2006. ICCAD '06. IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1092-3152
  • Print_ISBN
    1-59593-389-1
  • Electronic_ISBN
    1092-3152
  • Type

    conf

  • DOI
    10.1109/ICCAD.2006.320139
  • Filename
    4110177