DocumentCode
1652572
Title
Application-specific power-efficient approach for reducing register file vulnerability
Author
Tabkhi, Hamed ; Schirner, Gunar
Author_Institution
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
fYear
2012
Firstpage
574
Lastpage
577
Abstract
This paper introduces a power efficient approach for improving reliability of heterogeneous register files in embedded processors. The approach is based on the fact that control applications have high demands in reliability, while many special-purpose register are unused in a considerable portion of execution. The paper proposes a static application binary analysis which is applied at function-level granularity and offers a systematic way to manage the RF´s protection by mirroring the content of used registers into unused ones. The simulation results on an enhanced Blackfin processor demonstrate that Register File Vulnerability Factor (RFVF) is reduced from 35% to 6.9% in cost of 1% performance lost on average for control applications from Mibench suite.
Keywords
embedded systems; file organisation; microprocessor chips; power aware computing; Blackfin processor; RFVF; application specific power efficient approach; embedded processors; file vulnerability register; power efficient approach; register file vulnerability factor; static application binary analysis; Benchmark testing; Program processors; Radio frequency; Registers; Reliability; Signal processing; Simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4577-2145-8
Type
conf
DOI
10.1109/DATE.2012.6176535
Filename
6176535
Link To Document