• DocumentCode
    1654933
  • Title

    A 0.1 μm inverted-sidewall recessed-channel (ISRC) nMOSFET for high performance and reliability

  • Author

    Lyu, Jeongho ; Park, Byung-Gook ; Chun, Kukjin ; Lee, Jong

  • Author_Institution
    ISRC, Seoul, South Korea
  • fYear
    1995
  • Firstpage
    431
  • Lastpage
    434
  • Abstract
    We have developed a 0.1 μm recessed channel MOSFET structure called ISRC (Inverted Sidewall Recessed Channel) and optimized its process parameters. The maximum transconductance at VD=2.0 V is 446 mS/mm for the 0.1 μm channel device and the DIBL (Drain Induced Barrier Lowering) is 66 mV from VD=0.1 V to VD =2.0 V. The impact ionization rate falls significantly as VD falls below 1.5 V
  • Keywords
    MOSFET; impact ionisation; ion implantation; semiconductor device reliability; 0.1 micron; 446 mS/mm; NMOSFET; drain induced barrier lowering; high performance; high reliability; impact ionization rate; inverted-sidewall recessed-channel; maximum transconductance; n-channel MOSFET; process parameters optimisation; Doping; Etching; Furnaces; Impact ionization; MOSFET circuits; Oxidation; Reliability engineering; Semiconductor device reliability; Threshold voltage; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1995. IEDM '95., International
  • Conference_Location
    Washington, DC
  • ISSN
    0163-1918
  • Print_ISBN
    0-7803-2700-4
  • Type

    conf

  • DOI
    10.1109/IEDM.1995.499231
  • Filename
    499231
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1654933