DocumentCode
1656669
Title
Design and Performance Testing of a FPGA Based PTP System
Author
Wang Wen-Nai ; Li Xing-Chao
Author_Institution
Sch. of Comm. & Inform. Eng., Nanjing Univ. Posts & Telecomm, Nanjing, China
fYear
2011
Firstpage
1
Lastpage
4
Abstract
IEEE 1588 specifies the precision time protocol (PTP) to synchronize independent locks with high synchronization accuracy. In this paper, PTP is implemented based on embedded FPGA board with hardware based timestamp and the performances of system setup for wire and wireless network are presented and analyzed.
Keywords
field programmable gate arrays; logic design; logic testing; protocols; radio networks; synchronisation; FPGA design; IEEE 1588; PTP system; embedded FPGA board; field programmable gate arrays; hardware-based timestamp; high-synchronization accuracy; independent lock synchronization; performance testing; precision time protocol; wire network; wireless network; Field programmable gate arrays; Hardware; Protocols; Software; Synchronization; Wireless LAN; Wireless networks;
fLanguage
English
Publisher
ieee
Conference_Titel
Wireless Communications, Networking and Mobile Computing (WiCOM), 2011 7th International Conference on
Conference_Location
Wuhan
ISSN
2161-9646
Print_ISBN
978-1-4244-6250-6
Type
conf
DOI
10.1109/wicom.2011.6040599
Filename
6040599
Link To Document