• DocumentCode
    1656942
  • Title

    A 0.54 μm2 self-aligned, HSG floating gate cell (SAHF cell) for 256 Mbit flash memories

  • Author

    Shirai, H. ; Kubota, T. ; Honma, I. ; Watanabe, H. ; Ono, H. ; Okazawa, T.

  • Author_Institution
    ULSI Device Dev. Lab., NEC Corp., Sagamihara, Japan
  • fYear
    1995
  • Firstpage
    653
  • Lastpage
    656
  • Abstract
    A 0.54 μm2 self-aligned memory cell with hemispherical-grained (HSG) poly-Si floating gate (SAHF cell) has been developed for 256 Mbit flash memories. Applying hemispherical-grained (HSG) poly-Si to floating gate extends the upper surface area to double that of the floating gate in comparison with the conventional ones. A high capacitive-coupling ratio of 0.8 and buried n+ diffusion layers which are self-aligned to the floating gate poly-Si are realized simultaneously with a simple cell structure and fewer process steps
  • Keywords
    EPROM; MOS memory circuits; cellular arrays; diffusion barriers; elemental semiconductors; integrated memory circuits; memory architecture; silicon; 256 Mbit; SAHF cell; Si; capacitive-coupling ratio; diffusion layers; flash memories; hemispherical-grained polysilicon; self-aligned HSG floating gate cell; upper surface area; Application software; Fabrication; Flash memory; Handheld computers; Laboratories; Mobile computing; National electric code; Nonvolatile memory; Operating systems; Ultra large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1995. IEDM '95., International
  • Conference_Location
    Washington, DC
  • ISSN
    0163-1918
  • Print_ISBN
    0-7803-2700-4
  • Type

    conf

  • DOI
    10.1109/IEDM.1995.499304
  • Filename
    499304