A PN gate polysilicon thin film transistor

Author

Min, Byung-Hyuk ; Park, Cheol-Min ; Han, Min-Koo

Author_Institution

Dept. of Electr. Eng., Seoul Nat. Univ., South Korea

fYear

1995

Firstpage

833

Lastpage

836

Abstract

We propose and fabricate a new polysilicon thin film transistor (poly-Si TFT) which exhibits the properties of an offset gated structure in the OFF state, while acting as a non-offset structure in the ON state. The fabrication process is compatible with the conventional non-offset poly-Si TFTs process and does not require any additional mask. Experimental results show that the leakage current of the new device is two orders of magnitude lower than that of the non-offset device, while the ON current of the new device is almost identical with that of the non-offset device. It is observed that the ON/OFF current ratio of the proposed poly-Si TFT is improved remarkably

Keywords

carrier mobility; elemental semiconductors; leakage currents; silicon; thin film transistors; ON/OFF current ratio; Si; leakage current; nonoffset structure; offset gated structure; pn junction gate; polysilicon thin film transistor; Active matrix liquid crystal displays; Current measurement; Electric resistance; Electrodes; Fabrication; Leakage current; Medical simulation; Region 4; Thin film transistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1995. IEDM '95., International

Conference_Location

Washington, DC

ISSN

0163-1918

Print_ISBN

0-7803-2700-4

Type

conf

DOI

10.1109/IEDM.1995.499346

Filename

499346