DocumentCode
1662798
Title
Mobility enhancement on nano-strained NMOSFET with epitaxial silicon buffer layers
Author
Wang, Mu-Chun ; Yang, Ren-Hau ; Liao, Wen-Shiang ; Yang, Hsin-Chia ; Luo, Yi-Cheng ; Hsieh, Zhen-Ying ; Huang, Heng-Sheng
Author_Institution
Dept. of Electron. Eng., Ming Hsin Univ. of Sci. & Technol., Hsinchu, Taiwan
fYear
2010
Firstpage
237
Lastpage
240
Abstract
SiGe deposition as a channel layer to promote the channel mobility is a promising way in the development of nano-level MOSFET (metal-oxide-semiconductor field-effect transistor). However, the thermal or mechanical stress between strained SiGe layer and crystalline wafer surface is increased more and easy to generate the dislocation defects, inversely reducing the channel mobility performance. Using the Si buffer layer is an effective method to release these stresses, but the optimal thickness of this buffer layer must be controlled well, otherwise the Ge atom diffuses more into this layer and deteriorates the desired function of depositing SiGe as a channel layer at 90-nm-node process or below.
Keywords
Ge-Si alloys; MOSFET; thermal stresses; SiGe; crystalline wafer surface; dislocation defects; epitaxial buffer layers; mechanical stress; metal-oxide-semiconductor field-effect transistor; mobility enhancement; nanostrained NMOSFET; size 90 nm; thermal stress; Atomic measurements; Epitaxial growth; Instruments; Logic gates; MOSFET circuits; Scattering; Thickness measurement; Epitaxial silicon; MOSFET; Mobility; Si buffer layer; Strained silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Next-Generation Electronics (ISNE), 2010 International Symposium on
Conference_Location
Kaohsiung
Print_ISBN
978-1-4244-6693-1
Type
conf
DOI
10.1109/ISNE.2010.5669152
Filename
5669152
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