• DocumentCode
    1662998
  • Title

    Synthesis of 3D asynchronous state machines

  • Author

    Yun, Kenneth Y. ; Dill, David L. ; Nowick, Steven M.

  • Author_Institution
    Comput. Syst. Labs., Stanford Univ., CA, USA
  • fYear
    1992
  • Firstpage
    346
  • Lastpage
    350
  • Abstract
    A synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple-input-change fundamental mode operation, is described. This implementation of burst-mode state machines uses standard combinational logic, generates low-latency outputs and guarantees freedom from hazards at the gate level. It requires no locally synthesized clock and no storage elements. In addition, primary outputs as well as additional state variables are used as feedback variables. The state assignment technique is based on the construction of a three-dimensional next-state table
  • Keywords
    asynchronous sequential logic; combinatorial circuits; controllers; feedback; state assignment; 3D asynchronous state machines; asynchronous controllers; burst-mode specifications; feedback variables; low-latency outputs; multiple-input-change fundamental mode operation; primary outputs; standard combinational logic; state assignment; state variables; Clocks; Control system synthesis; Delay; Design methodology; Hardware; Hazards; Laboratories; Logic; Output feedback; State feedback;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-3110-4
  • Type

    conf

  • DOI
    10.1109/ICCD.1992.276286
  • Filename
    276286