A 32nm high-k metal gate application processor with GHz multi-core CPU

Author

Yang, Se-Hyun ; Lee, Seogjun ; Lee, Jae Young ; Cho, Jeonglae ; Lee, Hoi-Jin ; Cho, Dongsik ; Heo, Junghun ; Cho, Sunghoon ; Shin, Youngmin ; Yun, Sunghee ; Kim, Euiseok ; Cho, Ukrae ; Pyo, Edward ; Park, Man Hyuk ; Son, Jae Cheol ; Kim, Chinhyun ; Youn,

Author_Institution

Samsung Electron., Yongin, South Korea

fYear

2012

Firstpage

214

Lastpage

216

Abstract

Samsung´s next-generation 32nm dual/quad-core Exynos™ processor integrates 2 or 4 ARM-v7A architecture cores, a 2-port DRAM controller and numerous multimedia accelerators and connectivity blocks on the same die. It is an application processor (AP) designed to cover a wide variety of mobile applications and handle unprecedented data-processing throughput and multimedia performance, without sacrificing the battery life or exceeding the thermal power dissipation envelope. The architecture diagram is shown in Fig. 12.1.1 and the die photo for the quad-core configuration is shown in Fig. 12.1.7.

Keywords

microprocessor chips; multiprocessing systems; 2-port DRAM controller; ARM-v7A architecture cores; GHz multi-core CPU; Samsung; high-k metal gate application processor; mobile applications; multimedia accelerators; multimedia performance; next-generation dual/quad-core Exynos processor; size 32 nm; thermal power dissipation envelope; Batteries; Central Processing Unit; Graphics processing unit; Logic gates; Random access memory; Temperature sensors; Thermal management;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

978-1-4673-0376-7

Type

conf

DOI

10.1109/ISSCC.2012.6176980

Filename

6176980