• DocumentCode
    1665715
  • Title

    Transition fault simulation for sequential circuits

  • Author

    Cheng, Kwang-Ting

  • fYear
    1995
  • Firstpage
    723
  • Keywords
    CMOS logic circuits; Circuit faults; Circuit simulation; Circuit testing; Clocks; Combinational circuits; Delay; Semiconductor device modeling; Sequential analysis; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1992. Proceedings., International
  • Conference_Location
    Baltimore, MD
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-0760-7
  • Type

    conf

  • DOI
    10.1109/TEST.1992.527894
  • Filename
    527894