DocumentCode
1669217
Title
A 12b 500MS/s DAC with >70dB SFDR up to 120MHz in 0.18μm CMOS
Author
Doris, K. ; Briaire, J. ; Leenaerts, D. ; Vertreg, Maarten ; van Roermund, Arthur
Author_Institution
Tech. Univ. Eindhoven
fYear
2005
Firstpage
116
Abstract
A CMOS current steering 12b 500MS/s 216mW DAC without any additional circuitry to remove errors introduced during the conversion process has >70dB SFDR up to 120MHz above the Nyquist band. This is comparable to state-of-the-art performance requiring additional circuitry, and better than any design without additional circuitry
Keywords
CMOS integrated circuits; digital-analogue conversion; signal sampling; 0.18 micron; 12 bit; 216 mW; CMOS current steering; DAC; Nyquist band; CMOS process; Capacitance; Clocks; Energy consumption; Frequency; Impedance; Linearity; Master-slave; Switches; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
0-7803-8904-2
Type
conf
DOI
10.1109/ISSCC.2005.1493896
Filename
1493896
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