DocumentCode
1669531
Title
A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip
Author
Torii, S. ; Suzuki, S. ; Tomonaga, H. ; Tokue, T. ; Sakai, J. ; Suzuki, N. ; Murakami, K. ; Hiraga, T. ; Shigemoto, K. ; Tatebe, Y. ; Ohbuchi, E. ; Kayama, N. ; Edahiro, M. ; Kusano, T. ; Nishi, N.
Author_Institution
NEC Corp., Kanagawa, Japan
fYear
2005
Firstpage
136
Abstract
A triple-CPU mobile application processor is developed on an 8.95mm×8.95mm die in a 0.13μm CMOS process. The IC integrates 3×ARM926 cores, a DSP several accelerators, as well as strong bus and memory interfaces. It consumes 120mW for digital TV, Web browser, and 30 graphics, and 250mW@200MHz for 600MIPS with full processing.
Keywords
CMOS integrated circuits; cellular radio; digital signal processing chips; digital television; mobile computing; multimedia communication; online front-ends; 0.13 micron; 120 mW; 200 MHz; 250 mW; 70 muA; ARM926 cores; CMOS process; DSP; Web browser; accelerators; bus interfaces; digital TV; memory interfaces; mobile application; triple-CPU processor chip; Application software; Bandwidth; Cellular phones; Costs; Delay; Digital signal processing chips; Energy consumption; Programming; SDRAM; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
0-7803-8904-2
Type
conf
DOI
10.1109/ISSCC.2005.1493906
Filename
1493906
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