Simulation and characterization of dual-gate SOI MOSFET, on-chip fabricated with ISFET

Author

Yadav, J. ; Sinha, S. ; Sharma, A. ; Chaudhary, R. ; Mukhiya, R. ; Sharma, R. ; Khanna, V.K.

Author_Institution

Central Electron. Eng. Res. Inst. (CEERI), Pilani, India

fYear

2015

Firstpage

1

Lastpage

5

Abstract

The paper presents the process design, simulation and characterization of a silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG MOSFET) with Al metal gate. The proposed structure is an N-channel device, using aluminum nitride (AlN) as gate dielectric. The fully depleted SOI-based DG ISFET compatible with the complementary metal-oxide-semiconductor (CMOS) process is considered to be a very promising bio-chemical sensor. Silvaco^® TCAD tool is used to perform process design and simulations. The simulated and experimental results are compared, and are found to be in good agreement.

Keywords

MOSFET; aluminium compounds; ion sensitive field effect transistors; semiconductor process modelling; silicon-on-insulator; Al; AlN; CMOS process; complementary metal oxide semiconductor process; dual gate SOI MOSFET; dual gate metal oxide field effect transistor; fully depleted SOI based DG ISFET; gate dielectric; on-chip fabrication; process design; silicon-on-insulator; Aluminum nitride; Fabrication; Films; Logic gates; MOSFET; Sensors; Aluminum Nitride (AlN); Dual-gate SOI MOSFET; ISFET;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design and Test (VDAT), 2015 19th International Symposium on

Conference_Location

Ahmedabad

Print_ISBN

978-1-4799-1742-6

Type

conf

DOI

10.1109/ISVDAT.2015.7208080

Filename

7208080