• DocumentCode
    1675182
  • Title

    Multi terminal net routing for island style FPGAs using nearly-2-SAT computation

  • Author

    Mukherjee, Shyamapada ; Roy, Suchismita

  • Author_Institution
    Comput. Sci. & Eng., Nat. Inst. of Technol., Durgapur, India
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Detailed routing for multi terminal nets have been proposed in this paper for island style FPGA architectures. The demand of integrated circuits and their decreasing size keep the research on physical design automation alive. In the proposed technique, the detailed routing constraints for island style FPGAs are created in such a way that they can be represented as a set of Conjunctive Normal Form (CNF) clauses. The routing problem is implicitly conceptualized as a graph node colouring problem which is then expressed as a satisfiability problem where most of the clauses consist of 2 literals. Hence, the routing problem is represented as a “nearly-2-SAT” problem. 2-SAT, i.e. satisfiability of a CNF function with clauses of at most 2 literals, is polynomial time computable, whereas 3-SAT or more are NP-complete. The “nearly-2-SAT” conversion of the routing problem proposed here requires less number of clauses to formulate the routing function w.r.t the existing SAT-based routing techniques. In addition, more than 95% of clauses are of 2-literal which increases the efficiency and scalability of the technique.
  • Keywords
    computability; computational complexity; field programmable gate arrays; graph colouring; network routing; optimisation; 3-SAT; CNF clauses; CNF function; NP-complete problem; SAT-based routing techniques; conjunctive normal form; detailed routing constraints; field programmable gate arrays; graph node colouring problem; integrated circuits; island style FPGA architectures; multiterminal net routing; nearly-2-SAT computation; nearly-2-SAT conversion; nearly-2-SAT problem; physical design automation; routing function w.r.t; routing problem; Boolean functions; Color; Computer architecture; Field programmable gate arrays; Layout; Routing; Switches; 2-SAT; Detailed Routing; FPGA Architecture; Multi Terminal Nets; Satisfiability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design and Test (VDAT), 2015 19th International Symposium on
  • Conference_Location
    Ahmedabad
  • Print_ISBN
    978-1-4799-1742-6
  • Type

    conf

  • DOI
    10.1109/ISVDAT.2015.7208142
  • Filename
    7208142