FPGA design of a robust phase locked loop algorithm for a three phase PWM grid connected converter

Author

Bejaoui, Mouna ; Slama-Belkhodja, Ilhem ; Monmasson, Eric ; Marinescu, Bogdan ; Charaabi, Lotfi

Author_Institution

L.S.E., ENIT, Tunis le Belvedere, Tunisia

fYear

2009

Firstpage

1

Lastpage

10

Abstract

The FPGA-design of a so-called rPLL for grid-connected renewable energy systems is developed. The design methodology leads to reduced consumed resources and time execution (1.14 mus with an XC3s400 FPGA device from Xilinx). Experimental results under healthy and faulty grid conditions illustrate the design effectiveness.

Keywords

PWM power convertors; field programmable gate arrays; integrated circuit design; phase locked loops; renewable energy sources; FPGA design; grid-connected renewable energy systems; robust phase locked loop algorithm; three phase PWM grid connected converter; Algorithm design and analysis; Circuit faults; Field programmable gate arrays; Frequency; Phase locked loops; Phased arrays; Pulse width modulation; Pulse width modulation converters; Renewable energy resources; Robustness; Design; Estimation technique; Phase Locked Loop; Three phase system; field-programmable gate array (FPGA);

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics and Applications, 2009. EPE '09. 13th European Conference on

Conference_Location

Barcelona

Print_ISBN

978-1-4244-4432-8

Electronic_ISBN

978-90-75815-13-9

Type

conf

Filename

5279334