DocumentCode
1681052
Title
Design and optimization of embedded power chip modules for double-sided cooling
Author
Yin, Jian ; van Wyk, J.D. ; Odendaal, W.G. ; Liang, Zhenxian
Author_Institution
Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
Volume
3
fYear
2004
Firstpage
1545
Abstract
This work presents a simple experimental method to obtain accurate characterization of double-sided cooling in single embedded power chip modules (EPCM), based on a simple experimental method using temperature cooling-down curve measurement. A one-dimensional thermal network is employed to describe the thermal characterizations of all layers and inter-layers of the single power packaging chip modules. 3-D simulation by means of Ideas software is used to evaluate the accuracy of the one-dimensional thermal network. The experimental based one-dimensional thermal network is shown to provide a powerful tool for the design and optimization of the embedded power chip packaging for double-sided cooling.
Keywords
chip scale packaging; embedded systems; integrated circuit design; optimisation; power engineering computing; semiconductor device packaging; temperature measurement; thermal management (packaging); 3-D simulation; Ideas software; design; double-sided cooling; embedded power chip modules; one-dimensional thermal network; optimization; power packaging chip modules; Design optimization; Electronic packaging thermal management; Electronics cooling; Power electronics; Power measurement; Semiconductor device packaging; Temperature measurement; Temperature sensors; Thermal conductivity; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Industry Applications Conference, 2004. 39th IAS Annual Meeting. Conference Record of the 2004 IEEE
ISSN
0197-2618
Print_ISBN
0-7803-8486-5
Type
conf
DOI
10.1109/IAS.2004.1348676
Filename
1348676
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