• DocumentCode
    1682069
  • Title

    An improved source design for scan BIST

  • Author

    Yu, Chaowen ; Li, Wei ; Reddy, Sudhakar M. ; Pomeranz, Irith

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
  • fYear
    2003
  • Firstpage
    106
  • Lastpage
    110
  • Abstract
    Recently, Markov sources were shown to achieve 100% fault efficiency at low area overhead when used as pseudo-random pattern generators in scan BIST. In this paper we give a new method of designing Markov sources. The new design attempts to match probabilities of 1 to 0 and 0 to 1 transitions in consecutive bits of a set of test vectors, taking into account that the transition probabilities may be different for different bit positions. Experimental results show that the proposed method considerably reduces the hardware overhead and test lengths required to achieve 100% fault coverage.
  • Keywords
    Markov processes; built-in self test; integrated circuit design; integrated circuit testing; Markov sources; area overhead; bit positions; built-in self-test; consecutive bits; fault coverage; fault efficiency; hardware overhead; pseudorandom pattern generators; scan BIST; source design; test lengths; test vectors; transition probabilities; Built-in self-test; Chaos; Circuit faults; Circuit testing; Cities and towns; Design methodology; Electrical fault detection; Fault detection; Hardware; Logic testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    On-Line Testing Symposium, 2003. IOLTS 2003. 9th IEEE
  • Print_ISBN
    0-7695-1968-7
  • Type

    conf

  • DOI
    10.1109/OLT.2003.1214375
  • Filename
    1214375