Multi-stage digital predistortion based on indirect learning architecture

In this paper, we propose a multi-stage indirect learning architecture (ILA) for digital predistortion. Unlike the conventional ILA, in multi-stage ILA the digital predistorter (PD) is implemented in two or more stages. We demonstrate that depending on the power amplifier (PA), multi-stage ILA can achieve same or even better performance than the conventional ILA but with significantly lower PD identification complexity. The identification complexity is measured by computing the number of multipliers needed for identification of PD. In addition to above, we also propose two algorithms for the identification of the multi-stage ILA coefficients. The performance of the multi-stage ILA is evaluated in terms of improvement in adjacent channel power ratio (ACPR) and error vector magnitude (EVM) at the output of PA when a Long Term Evolution-Advanced (LTE-Advanced) signal is applied at the input. The reference PA models used for simulation are the Wiener model and Wiener-Hammerstein model.