Accuracy management for VLSI timing analysis

The authors show that algorithms of different accuracy levels can be carefully and automatically mixed to get a desired global accuracy. For instance, highly accurate algorithms may only be required along critical paths to produce a highly accurate delay estimate. They outline several linear-time heuristic algorithms, based on a detailed analysis of simple logic chains, that allow the management of accuracy requirements within a simulation. Using these algorithms, future timing simulators for digital VLSI can determine which means of analysis is useful for each portion of a circuit on the basis of the overall accuracy specifications