• DocumentCode
    1685061
  • Title

    Financial modeling on the cell broadband engine

  • Author

    Agarwal, Virat ; Liu, Lurng-Kuo ; Bader, David A.

  • Author_Institution
    Coll. of Comput., Georgia Inst. of Technol., Atlanta, GA
  • fYear
    2008
  • Firstpage
    1
  • Lastpage
    12
  • Abstract
    High performance computing is critical for financial markets where analysts seek to accelerate complex optimizations such as pricing engines to maintain a competitive edge. In this paper we investigate the performance of financial workloads on the Sony-Toshiba- IBM Cell Broadband Engine, a heterogeneous multicore chip architected for intensive gaming applications and high performance computing. We analyze the use of Monte Carlo techniques for financial workloads and design efficient parallel implementations of different high performance pseudo and quasi random number generators as well as normalization techniques. Our implementation of the Mersenne Twister pseudo random number generator outperforms current Intel and AMD architectures by over an order of magnitude. Using these new routines, we optimize European option (EO) and collateralized debt obligation (CDO) pricing algorithms. Our Cell-optimized EO pricing achieves a speedup of over 2 in comparison with using RapidMind SDK for Cell, and comparing with GPU, a speedup of 1.26 as compared with using RapidMind SDK for GPU (NVIDIA GeForce 8800), and a speedup of 1.51 over NVIDIA GeForce 8800 (using CUDA). Our detailed analyses and performance results demonstrate that the Cell/B.E. processor is well suited for financial workloads and Monte Carlo simulation.
  • Keywords
    Monte Carlo methods; financial management; microprocessor chips; random number generation; European option; Monte Carlo techniques; Sony-Toshiba- IBM Cell Broadband Engine; collateralized debt obligation; financial markets; financial modeling; heterogeneous multicore chip; high performance computing; pricing engines; pseudo random number generator; Blades; Computer applications; Computer architecture; Educational institutions; Engines; High performance computing; Monte Carlo methods; Multicore processing; Performance analysis; Pricing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on
  • Conference_Location
    Miami, FL
  • ISSN
    1530-2075
  • Print_ISBN
    978-1-4244-1693-6
  • Electronic_ISBN
    1530-2075
  • Type

    conf

  • DOI
    10.1109/IPDPS.2008.4536320
  • Filename
    4536320